Xilinix Demonstrates Digital RF Solutions to Address 5G Radio Challenges

At the virtual IMS 2020 event, Xilinx showcased its latest innovations for both FR1 and FR2 5G Radios, using the Zynq UltraScale+ Gen 3 family. The demonstrations highlight the excellent RF performance of their latest RF sampling data converters and industry leading digitally assisted techniques like DPD (Digital Pre-Distortion) to enhance RF Power Amplifier performance and efficiency. The IMS 2020 event was held in a virtual format for the first time ever from August 04-06. The event presentations and showcases will be available on-demand till September 30.

XILINX DEMOS

DEMO 1: RFSoC Gen 3 RF Data Converter 5G NR Performance


Product: Zynq UltraScale+ RFSoC

The Zynq® UltraScale+™ RFSoCs integrate gigasample RF data converters and soft-decision forward error correction (SD-FEC) into an SoC architecture. The Zynq UltraScale+ RFSoC family simplifies system design with fewer components and provides platform hardware and software flexibility. Click here to know more. Its highlights include:

  • Industry’s Only Adaptable Single-Chip Radio Platform
  • Cost Effective and Power Efficient Devices
  • Future-Proof Comprehensive Solution
  • Broad Portfolio for Diverse Use Cases

Click here to view Xilinx Zynq® UltraScale+™ RFSoC Videos. Click to view/download Xilinx White Paper on “An Adaptable Direct RF-Sampling Solution”.

DEMO 2: Digitally Assisted RF Power Amplifier with RFSoC Gen 3

Product: Zynq UltraScale+ RFSoC ZCU208 Evaluation Kit

The Zynq® UltraScale+™ RFSoC ZCU208 Evaluation Kit is the ideal RF test platform for both out-of-box evaluation and cutting-edge application development. This kit features a Zynq UltraScale+ RFSoC ZU48DR, which integrates eight 14-bit 5GSPS ADCs, eight 14-bit 10GSPS DACs, and eight soft-decision forward error correction (SD-FEC) cores designed to jumpstart RF class applications.

The combination of Arm® Cortex®-A53 and Cortex-R5 subsystems, UltraScale+ programmable logic, and the highest signal processing bandwidth in a Zynq UltraScale+ device, makes the ZCU208 evaluation kit the most comprehensive RF Analog-to-Digital signal chain prototyping platform. Target Applications include: Remote PHY for Cable Access, Early Warning Phased Array Radar / Digital Array Radar, Satellite Communications, 5G Wireless, Test & Measurement, High Performance RF Applications. Click here to know more.


Product: Digital Pre-Distortion (DPD) IP

Digital Pre-Distortion (DPD) is one of the most fundamental building blocks in wireless communication systems today. It is used to increase the efficiency of Power Amplifiers. By reducing the distortion created by running Power Amplifiers in their non-linear regions, Power Amplifiers can be made to be far more efficient. Wireless base stations not employing CFR or DPD algorithms typically exhibit low efficiency, and therefore high operational and capital equipment costs. A typical Class AB LDMOS Power Amplifier with WCDMA waveforms may have approximately 8-15% efficiency. With CFR and DPD turned on, this efficiency can grow to as much as 30-40%, resulting in tremendous savings in CapEx and OpEx for network operators. With later generations of Power Amplifier design leveraging Doherty architectures, efficiencies in the 40%+ range with Xilinx DPD are possible.

The Xilinx DPD core reduces implementation time by providing a high performance DPD solution to customers as a parameterizable core rather than one that needs to be customized by hand. Furthermore, Xilinx DPD is tuned for implementation in Xilinx FPGAs, resulting in a very small FPGA footprint and the lowest cost FPGA solution available today. Click here to know more.

Product: Crest Factor Reduction (CFR) IP

The Crest Factor Reduction (CFR) is one of the most fundamental building blocks in wireless communication systems today. CFR is used to reduce the dynamic range of a transmitted signal so that amplifiers being used to transmit that signal can be run with less back off. In a typical commercial wireless system, this would be used in combination with Digital Up Conversion (DUC) and Digital Pre-Distortion (DPD). There are many different algorithms for CFR, from Peak Windowing (PW) and Noise Shaping (NS) to this method of Peak Cancellation (PC), which gives rise to the product name PC-CFR. This method is much more flexible than other methods, while being higher performance resulting in greater Peak to Average Ratio (PAR) reduction and yet extremely small and cost effective in its implementation.

The PC-CFR core reduces implementation time by providing a high performance CFR solution to customers as a parameterizable core, rather than one that needs design by hand to potentially meet a multitude of different wireless standards and performance criteria. Click here to learn more.

Click here to view everythingRF’s coverage of IMS 2020.

Xilinx

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