Advanced mm-Wave Chip Design Looking Beyond 5G

The worldwide race to deploy 5G wireless networks is still in its early stages, but researchers at the Carnegie Mellon University are already looking beyond 5G. The massive interconnected web of IoT and personal devices enabled by 5G will increase demand for higher data rates and lower latency. To support this beyond-5G network of the future, Jeyanandh Paramesh, ECE Ph.D student Susnata Mondal, and recent ECE Ph.D. graduate Rahul Singh presented a new chip design at the 2019 International Solid-State Circuit’s Conference (ISSCC) in San Francisco on February 20th 2019.

Paramesh’s team’s new chip is an advanced millimeter-wave frequency chip for multiple-input multiple-output (MIMO), meaning it transfers multiple data streams simultaneously between users. The millimeter-wave range is a spectrum of frequencies currently being explored to expand 5G and beyond-5G capabilities.

The benefits of the team’s chip design are two fold. One, the chip has a highly reconfigurable, bi-directional architecture; this allows it to transmit or receive signals across a wide range of frequencies using a wide variety of signaling mechanisms. Two, the chip supports full-duplex beamforming.

Traditionally, wireless communication has been limited to ‘half-duplex’ where the transmitter and the receiver are never simultaneously on, or they operate simultaneously at different frequencies. With full-duplex communication the chip can transmit and receive simultaneously in the same frequency band, thereby enabling up to a doubling in throughput. Combining full-duplex with MIMO is a game changer in future mobile networks, and this chip is a step in that direction.

These features combine to make a chip with the potential to significantly increase the amount of communications beyond-5G networks could support.

This chip is the latest design from Paramesh’s group, which has already resulted in the creation of the first millimeter-wave MIMO chips. These chips have been reported at the ISSCC and RFIC conferences and in archival papers in the IEEE Journal of Solid-State Circuits, the premier journal in the field of IC design.