What are Fractional-N Frequency Synthesizers?

Fractional-N frequency synthesizers have revolutionized radio frequency (RF) design by offering a way to generate high-quality signals with very fine frequency steps, without the drawbacks associated with traditional synthesizers. They combine the simplicity of Phase-Locked Loop (PLL) technology with a clever approach to frequency division, overcoming key challenges such as large division ratios and poor loop performance.

In RF design, frequency synthesizers are vital components that generate precise frequencies. A traditional synthesizer, using a PLL, typically works by multiplying a phase detector's comparison frequency to generate an output signal. For small frequency steps, however, the comparison frequency must also be small, leading to large division ratios. For example, in a system where a 10 MHz reference signal requires 100 Hz steps, a division ratio of 100,000 would be required. This is feasible, but it brings several problems:

• Slow Frequency Switching: The bandwidth of the PLL loop would be very narrow (only 10 Hz in this example), which results in long settling times when the frequency needs to be changed.

• Large Passive Components: The loop bandwidth constraints often require large passive components (such as capacitors and inductors) to stabilize the system. 

• Increased Phase Noise: With such a narrow bandwidth, phase noise becomes more pronounced within the loop's frequency range and beyond the VCO's output. 

A solution to these limitations is found in fractional N frequency synthesizers. 

How do Fractional N Frequency Synthesizers Work? 

Fractional N frequency synthesis works by modifying the traditional PLL architecture. Instead of using a fixed integer division ratio, fractional N synthesizers employ a dual-modulus divider, which alternates between two division ratios: N and N+1. This provides greater flexibility than a fixed integer division ratio, allowing for smaller frequency steps while maintaining high comparison frequency and loop bandwidth, which collectively improve synthesizer performance.

Key Concepts: 

Dual-Modulus Divider: Alternates between division ratios N and N+1. 

Fractional Division Ratio: Achieved by alternating between N and N+1, resulting in finer frequency resolution. 

Effective Division Ratio (N_eff): The effective division ratio (Neff) reflects the "average" division ratio achieved over time when the divider alternates between N and N+1. This alternation is crucial for fractional frequency synthesis. The formula for the effective division ratio is: 

Where: 

A: The number of cycles where the divider uses the value N. 

B: The number of cycles where the divider uses the value N+1. 

A+B: The total number of cycles. 

In contrast, a conventional PLL uses a fixed integer ratio N, while in fractional-N synthesis, the divider toggles between N and N+1, distributing the time between the two values.  

Example of Operation: For instance, if A = 3 - the synthesizer spends 3 cycles at N. And B = 2 - the synthesizer spend 2 cycles at N+1). This results in a fractional division ratio closer to N + 0.4.

Output Frequency: The output frequency of the synthesizer is determined by the following formula:

Where f_ref is the reference frequency and P is the prescaler. 

Advantages of Fractional-N Synthesis 

• Smaller Frequency Increments: Provides much smaller frequency steps than integer-N synthesizers, useful in applications requiring precise frequency control (e.g., telecommunications, GPS). 
• Higher Comparison Frequency: Achievable because the effective division ratio includes fractional components, improving loop response and phase noise suppression. 
• Reduced Phase Noise: Higher operating frequencies reduce phase noise impact, which is critical for applications like radar, wireless communication, and high-speed digital clocks.

Spurious Emissions and Their Mitigation 

Despite these advantages, fractional N frequency synthesizers can generate spurious emissions, which are unwanted signals that appear close to the desired carrier frequency. These spurious signals are a result of the phase error accumulation during the switching of the modulus divider. Over time, the system's feedback frequency averages to the reference frequency, which causes periodic disturbances in the VCO control voltage. This leads to spurious signals that are close to the desired output frequency. 

Several techniques can be employed to reduce these spurious emissions: 

1. Phase Error Cancellation: Systems like Digiphase, developed by Racal, use phase error cancellation techniques to reduce spurious signals by compensating for the accumulated phase error. 

2. Random Modulus Switching: By randomly switching between the division ratios, the synthesizer can mask these spurious signals as noise, making them less distinguishable. 

Despite these mitigation techniques, fractional-N synthesizers are often more common in radio receivers where spurious emissions can be tolerated to some extent, but are typically avoided in signal generators that require ultra-clean signals.