Design of Power Amplifier using Harmonic-balanced Software in Tandem with Impedance Matching Network Synthesis Software

This article describes a procedure for the design and development of power amplifiers using harmonic-balanced software in tandem with impedance matching network synthesis software. For this purpose a particular design problem will be discussed.

A new amplifier had to be developed to replace an existing amplifier which had been a sound product for many years, but the RF bipolar power transistors used in it had become obsolete. This pre-existing amplifier works in Class A mode and delivers P1dB in excess of 20W in a 20MHz bandwidth. Its center frequency is tunable from 380 to 470 MHz. It is in a 2 stage single ended configuration with gain of more than 23.0 dB and the input/output return loss of better than 20dB. This amplifier has been designed by "cut and try" modification of the schematics and topologies suggested by the manufactures of the transistors. The topology is mixed - microstrip, lumped capacitors, porcelain tuning capacitors and coils with ferrite beads are used. The tuning in production takes some time, but it is fairly consistent and straightforward. Very often two of these amplifiers are used in parallel, in a balanced configuration, to produce P1dB of more than 40W. The two amplifiers and the hybrid couplers are in connectorized packages and are connected together by coaxial cables.

Please note: By downloading a white paper, the details of your profile might be shared with the creator of the content and you may be contacted by them directly.