A CMOS Fast Settling Time Low-Noise LowDropout Regulator with Current Limiter

This paper presents a low-dropout regulator (LDO) for portable applications with current limiter. To minimize effect of bandgap noise, novel low pass filter associate with bandgap reference circuit, which provides highly filtered reference voltage and fast settling time, is implemented. Dynamically operating current limiter using decent current comparator limits output current. Threshold current of current limiter is set to 230mA of output load current. The proposed LDO with low pass filter and current limiter has been implemented in a 0.6um n-well CMOS process. The proposed LDO dissipates 65uA quiescent current at 150mA full load condition and its output noise, PSR, and load regulation are 407.8nV/√Hz at 100Hz, 51.2dB at 10kHz, and 43mV/150mA respectively. The maximum transient output voltage variation is within 3.2% of the output voltage with load step changes of 150 mA and 1µF output capacitor. 

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