Digital Signal Integrity (SI) can be described simply as the study of pulse distortion. Historically, pulsed signals were measured with an oscilloscope or digital signal analyzer. With the advent of today’s Gigabit data rates, Bit Error Rate Testing (BERT) has become the measurement of choice. Since PC‘s are targeted to reach eight Gigabits per second (Gbps) in the near future, the digital community has been forced to solve the types of analog problems that RF/MW engineers live with on a daily basis. Therefore, measurements such as SWR, insertion loss, leakage between printed tracks and delay times, have become parameters that now must be evaluated by digital designers to assure “pulse fidelity.” Testing is further complicated by the fact that balanced lines and circuits are used to reduce interference. And, when many complex circuits are compressed onto a multilayer PC board, the difficulty increases. On top of that, it is a challenge to contact the desired point on the circuit, since it may be accessed only by using destructive procedures. Test connectors located at strategic points in the circuit offer one solution; however, they not only occupy valuable real estate, they may introduce their own set of problems.
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