Load Pull Validation of Large Signal Cree GaN Field Effect Transistor (FET) Model

Large signal models for RF power transistors, if matched well with measured performance, are an ideal tool for reducing PA design iterations, design time and development costs. Self-heating of the device and the complex dependence of the nonlinearity of component parameters on signal level, thermal effects and ambient conditions often makes it difficult to predict exactly the large signal performance of RF power devices. Cree’s GaN HEMT devices on SiC substrate, because of their high efficiency, high gain and relatively easy matching characteristics are becoming popular in many applications. As such the users of these devices look to the accuracy of models to be able to evaluate Cree’s devices within their simulation environments.

One of the main advantages of this approach is that no hardware needs to be developed, and there is no need for time consuming and potentially inaccurate load-pull measurements. It is also possible to do more in-depth what-if analysis, which enables faster design cycles, closes links with layout and results in more first pass design successes. At Cree, there is significant historical information available to demonstrate successful use of large signal models in validating designs over drive levels, frequency, bias, and temperature for many diverse design practices for discrete, hybrid and MMIC products development.

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