It is not uncommon for large clock trees to route clock signals through multiple clock devices, using multiple transmission line types, and across multiple boards and coaxial cables. Even when best practices are followed, any one of these media can introduce greater than 10 ps clock skew. However, in some applications, it is desired for all clock signals to achieve less than 1 ps skew. Some of these applications include phased array, MIMO, radar, electronic warfare (EW), millimeter wave imaging, microwave imaging, instrumentation, and software-defined radio (SDR).
This article identifies several areas of concern in the design process, manufacturing process, and application environment that can cause clock skews of 1 ps or more. With regards to these areas of concern, several recommendations, examples, and rules of thumb will be provided to help the reader gain an intuitive feel for the root cause and magnitude of clock skew errors.