Characterization of RF Transmission Lines on Ion-Implanted CMOS Wafers

Author: Kamaljeet Singh, Deepak Banghar and Surendra Pal

In spite of rapid technology evolution for the use of silicon in RF applications, the main technology challenge to realize high RF performance in silicon to overcome the high substrate losses and cross-talk associated with the CMOS grade silicon. Further, technology advancement demands on-chip integration of transformers, baluns, filters, and the co-integration of digital and RF systems on a single silicon chip. But this is hampered due to low-resistivity of CMOS grade Si (typically 3-5 Ω-cm) wafer, resulting in substantial energy losses and dielectric attenuation.

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