Using AnalystTM to Quickly and Accurately Optimize a Chip-Module-Board Transition

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  • Author: Dr. John Dunn
3D electromagnetic (EM) simulators are commonly used to help design board-to-chip transitions. AWR now makes life easier for circuit designers with the introduction of AnalystTM, the industry’s first full featured, 3D EM finite element method (FEM) simulator integrated within the circuit design environment, without the need to launch a third party drawing and simulation tool. The key advantage of Analyst over other available 3D simulators is its tight integration within Microwave Office® (MWO), AWR’s circuit design and simulation environment. This paper highlights the unique features of Analyst by demonstrating the optimization of the transition from a board-to-module-to-chip signal path. The example shows how the ability to access Analyst from within in the MWO environment saves designers time and provides ready access to powerful layout and simulation tools that are not available in typical circuit design tools. Analyst simplifies layout setup and drawing by offering preconfigured 3D parametric cells (Pcells) for the bond wires and ball grid arrays (BGAs). Hierarchy is supported in the EM layout, enabling easier reuse of designs. Tuning, optimization, and sensitivity and yield analysis can be quickly implemented through the use of parameterized layout, without having to leave the MWO environment. Since Analyst is optimized for RF designers with automatic simulation settings for typical technologies, users usually do not need to go into the simulation settings of the software. Designers can now concentrate on their design, easily using 3D EM simulation when needed, without having to spend time learning a complicated third product tool. Indeed, if they already use AXIEM®, AWR’s planar EM simulation tool, they will find Analyst looks almost the same. The learning curve for making effective designs is therefore very short.
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