Timing Technology Helps Push the Performance Boundaries of Optical Modules

Parker Traweek, SiTime - SiTime

Jan 27, 2021

Widespread deployment of 5G networks will enable tremendous advancements in connectivity and communications, increasing bandwidth 10-fold and reducing latency by 50 times. Achieving such massive improvements at scale requires rapid evolution of equipment and components used in datacenters. Optical transceivers, responsible for connecting and translating data carried over optical fiber into electrical signals within datacenters, are a prime example of rapidly evolving devices.

To handle huge increases in data traffic driven by 5G, optical module transmission rates are doubling and, in some cases, quadrupling. While 100 gigabit per second (Gbps) data rate modules were commonly used in 2020, 400 Gbps module deployment is rapidly increasing, and 800 Gbps modules are now in development. Higher-capacity 400 Gbps and 800 Gbps networks are placing greater demands on optical modules and the oscillators within them. These timing devices must provide greater functionality with denser designs, lower power per bit, and tighter jitter than their predecessors.

Hyperscale datacenters are a major driver of increased optical throughput. 5G requires the transmission and computing of massive amounts of data. To accommodate this need, datacenters must employ higher capacity optical modules. However, because data centers are space constrained and costly to expand, optical modules must double or quadruple their data rates while minimizing footprint expansion.

The power needed to operate datacenters is extraordinary. According to the sustainable information and communications technology (ICT) expert Anders Andrae, datacenters are projected to account for as much as eight percent of global electricity consumption by 2030. Optical modules are expected to make vast improvements in throughput with minimal extra power required. Datacenters, in addition to other high-bandwidth data communications applications, are pushing the boundaries of optical module technology and by extension placing greater requirements on oscillator technology.

Optical modules are designed to convert incoming optical signals into electrical signals and conversely transform outgoing electrical signals back to the optical format for transport, all without introducing errors. This conversion process poses a complex challenge of synchronizing the two time domains, that of the optical network and that of the chipset on the host board. Therefore, accurate timing is one of the most critical factors within an optical module. The component responsible for bridging the timing gap, aptly named the re-timer, requires a reference clock that must have increasingly lower jitter as the data rates increase from 100 Gbps to 400 Gbps and to 800 Gbps.

As 400 gigabit modules begin deployment, phase jitter of the reference oscillator becomes even more critical. RMS phase jitter is typically computed by integrating phase noise over 12 kHz to 20 MHz offset frequencies. For example, the SiT9501 differential oscillator based on MEMS technology from SiTime starts with a phase noise of -89 dBc per Hertz and ends with a noise floor of -170 dBc per Hertz. When integrated, the tight phase noise translates to an RMS phase jitter of 70 femtoseconds for a 156.25 MHz clock frequency. Oscillator RMS phase jitter quantifies the variation of a clock edge. RMS phase jitter in reference clocks driving optical modules is particularly important because it adds to jitter in the serial data stream passing through the module and can create errors if this jitter is too large. As throughput doubles from 400 Gbps to 800 Gbps, the jitter in the signal should reduce proportionally by a factor of two to maintain a similar timing margin.

Another important factor to consider when calculating phase jitter is the presence of spurious noise (spurs) in the phase noise. As shown in Figure 3, the phase noise plots appear comparable at first glance, but a closer look reveals the spurs in the quartz-based phase-locked loop (PLL) oscillator. In comparison, the phase noise of a MEMS-based oscillator has no spurs, resulting in RMS phase jitter of only 70 femtoseconds. Conversely, the quartz oscillator has a total RMS phase jitter of 267 femtoseconds. When calculated without the spurs, the RMS phase jitter of the quartz oscillator is only 90 femtoseconds, meaning the spurs attribute to 60 percent of the total jitter. Advanced integer-N PLL technology used in the MEMS oscillator enables tight phase noise and lower jitter without spurs.

While optical modules are driven to increase data rates by two to four fold, module components must deliver these performance improvements without increasing their footprint. For example, the SiT9501 oscillator is designed to meet the design requirements of 400 Gbps and 800 Gbps networks with no compromises in performance and RMS phase jitter as low as 70 femtoseconds.  Available in a small 2.0 mm x 1.6 mm package, the MEMS-based oscillator integrates source-bias resisters, resulting in up to a 50 percent reduction in the total footprint compared to alternative 2.5 mm x 2.0 mm quartz oscillators.

On-chip voltage regulators also filter power supply noise and improve the power integrity in many MEMS-based module designs. Reducing the timing footprint with such integrated features and small package sizes is important because more than half of the optical module is consumed by the laser subassembly and its associated electronics, leaving little room for the signal processing and data path. Any space savings allows module makers to pack in other features.

To address the strict current limitations imposed on optical modules, the removal of the two bias resistors leads to 32 milliamps lower current consumption with an AC-coupled output. Custom programming of the differential voltage swing at the factory enables the MEMS oscillator to comply with the differential input-swing requirements of any chipset, enabling system engineers to accommodate low-voltage chipsets with non-standard voltage swings. By matching the precise needs of the chipset, the typical termination can be eliminated, reducing power by up to 16 milliamps with a DC-coupled LVPECL output.

Driven by emerging technologies, the evolution of optical modules to 400 Gbps and 800 Gbps data rates demands leaps in performance without increasing device size and current consumption. This trend in turn is driving oscillators to be more power efficient, consume less space, and provide lower jitter. With innovations such as integrated bias resistors and programmable voltage swing, MEMS-based differential oscillators can deliver reductions in total footprint and current consumption within an envelope of 70 femtoseconds of RMS phase jitter. MEMS oscillators provide innovative timing solutions that meet the needs of optical module makers, enabling developers to quickly scale performance to support rapid advancements in 5G network equipment.