High Volume Test Methodology for HBT Device Ruggedness Characterization
Cristian Cismaru, Hal Banbrook, and Peter Zampardi
Developing rugged transistors requires careful consideration of the HBT’s collector design. In this work we present a test methodology for high-volume, in-line measurement of device ruggedness. This method is useful not only when developing new epitaxial structures for HBT devices, but also allows in-line monitoring of the device ruggedness for possible deviations due to epitaxial or manufacturing process variations. Moreover, the test is non-destructive.
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