UCLA and SEMI Get $300K Grant to Advance Heterogeneous Integration & Semiconductor Packaging Technologies

UCLA and SEMI Get $300K Grant to Advance Heterogeneous Integration & Semiconductor Packaging Technologies

The UCLA Center for Heterogeneous Integration and Performance Scaling (UCLA CHIPS) and SEMI have received a $300,000 grant from the U.S. Department of Commerce’s National Institute of Standards and Technology (NIST) to produce a roadmap for advancing heterogeneous integration and advanced semiconductor packaging technologies in the United States.

The roadmap will build upon the previously established International Technology Roadmap for Semiconductors (ITRS). UCLA CHIPS, which is housed at the UCLA Samueli School of Engineering, will translate the new Heterogeneous Integration Roadmap into a blueprint that defines manufacturing requirements for U.S. semiconductor factories. The grant, one of the first awarded by NIST’s Advanced Manufacturing Technology Roadmap Program (MfgTech), will fund the project for 18 months.

“While the Heterogeneous Integration Roadmap (HIR) is application-focused, our work will translate this roadmap into a manufacturing infrastructure blueprint that starts at the basic materials used in advanced packaging and breaks down integrated processes into individual unit processes,” said Subramanian Iyer, a distinguished professor of electrical and computer engineering who holds UCLA’s Charles P. Reames Endowed Chair and is the director of UCLA CHIPS. “Some of them will diverge from traditional silicon processes and include custom manufacturing tools and processes that address dies, wafers, and panels. Our roadmap will also be customizable to work with many application-dependent variables.”

Supported by microelectronics leaders, SEMI and UCLA CHIPS will first create a technology-neutral communications platform for peers across the supply chain, academics, and industry experts. SEMI, a global industry association that unites the electronics manufacturing and design supply chain, will define a process for prioritizing and guiding critical areas of the HIR to standardization. UCLA will organize academically themed workshops and panels to ensure the roadmaps are scalable and extendable as new applications evolve and new processes are developed.

“SEMI and UCLA CHIPS look forward to leveraging our expertise in semiconductor and packaging roadmaps — from upstream innovations to downstream manufacturing processes and assembly and distribution — to develop the HIR and take the next step toward factory implementation,” said Melissa Grupen-Shemansky, SEMI’s chief technology officer and vice president of SEMI Technology Communities. “SEMI will also turn to its workforce development strategies to offer HIR technology training at all levels of education by focusing on transforming innovations into cost-effective, customizable large-scale manufacturing in the U.S.”

Publisher: everything RF